Photolithography is commonly used during formation of integrated circuits on semiconductor wafers. More specifically, a form of radiant energy (such as, for example, ultraviolet light) is passed through a radiation-patterning tool and onto a semiconductor wafer. The radiation-patterning tool can be, for example, a photomask or a reticle, with the term “photomask” traditionally being understood to refer to masks which define a pattern for an entirety of a wafer, and the term “reticle” traditionally being understood to refer to a patterning tool which defines a pattern for only a portion of a wafer. However, the terms “photomask” (or more generally “mask”) and “reticle” are frequently used interchangeably in modern parlance, so that either term can refer to a radiation-patterning tool that encompasses either a portion or an entirety of a wafer. For purposes of interpreting the claims that follow, the terms photomask and reticle are to be understood to be utilized with their traditional meanings.
Radiation-patterning tools contain light restrictive regions (for example, totally opaque or attenuated/half-toned regions) and light transmissive regions (for example, totally transparent regions) formed in a desired pattern. A grating pattern, for example, can be used to define parallel-spaced conductive lines on a semiconductor wafer. The wafer is provided with a layer of photosensitive resist material commonly referred to as photoresist. Radiation passes through the radiation-patterning tool onto the layer of photoresist and transfers the mask pattern to the photoresist. The photoresist is then developed to remove either the exposed portions of photoresist for a positive photoresist or the unexposed portions of the photoresist for a negative photoresist. The remaining patterned photoresist can then be used as a mask on the wafer during a subsequent semiconductor fabrication step, such as, for example, ion implantation or etching relative to materials on the wafer proximate the photoresist.
Advances in semiconductor integrated circuit performance have typically been accompanied by a simultaneous decrease in integrated circuit device dimensions and a decrease in the dimensions of conductor elements which connect those integrated circuit devices. The demand for ever smaller integrated circuit devices brings with it demands for ever-decreasing dimensions of structural elements, and ever-increasing requirements for precision and accuracy in radiation-patterning with reticles and photomasks.
It would be desirable to develop improved methods for forming decreased circuit device dimensions for integrated circuit devices, and to develop improved methods for utilizing radiation-patterning tools.